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ov5640摄像头视频通过ddr3缓存后#xff0c;最后使用hdmi接口进行输出显示
二#xff0c;摄像头硬件说明
2.1#xff0c;像头硬件管脚
如下图所示#xff0c;一共18个管脚 2.2#xff0c;摄像头电源初始化时序
因这个ov5640摄像头是买的老摄像…一功能框图
ov5640摄像头视频通过ddr3缓存后最后使用hdmi接口进行输出显示
二摄像头硬件说明
2.1像头硬件管脚
如下图所示一共18个管脚 2.2摄像头电源初始化时序
因这个ov5640摄像头是买的老摄像头所以需要对Reset和PWDN的电源上电进行控制控制时序如下图所示。
2.3电源初始化程序
其中cmos_pwdn和cmos_rst_n为电源初始化管脚初始化完成后power_done会输出高电平
2.3摄像头硬件实物 开发板摄像头硬件连接三摄像头初始化配置
摄像头初始化配置如下图所示这里将摄像头的分辨率设置为720p输出显示注意这里摄像头初始化配置是等摄像头电源配置完成后开始摄像头初始化配置只有当power_done拉高后开始初始化配置。 摄像头720p配置文件
timescale 1ns / 1ps
//
// Company:
// Engineer:
//
// Create Date: 2023/12/17 16:03:26
// Design Name:
// Module Name: lut_ov5640_rgb565_1280_720
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//module lut_ov5640_rgb565_1280_720(input[9:0] lut_index, //Look-up table addressoutput reg[31:0] lut_data //Device address (8bit I2C address), register address, register data
);always(*)
begincase(lut_index) 10d0: lut_data {8h78 , 24h310311};10d1: lut_data {8h78 , 24h300882};10d2: lut_data {8h78 , 24h300842};10d3: lut_data {8h78 , 24h310303};10d4: lut_data {8h78 , 24h3017ff};10d5: lut_data {8h78 , 24h3018ff};10d6: lut_data {8h78 , 24h30341A};10d7: lut_data {8h78 , 24h303713};10d8: lut_data {8h78 , 24h310801};10d9: lut_data {8h78 , 24h363036};10d10: lut_data {8h78 , 24h36310e};10d11: lut_data {8h78 , 24h3632e2};10d12: lut_data {8h78 , 24h363312};10d13: lut_data {8h78 , 24h3621e0};10d14: lut_data {8h78 , 24h3704a0};10d15: lut_data {8h78 , 24h37035a};10d16: lut_data {8h78 , 24h371578};10d17: lut_data {8h78 , 24h371701};10d18: lut_data {8h78 , 24h370b60};10d19: lut_data {8h78 , 24h37051a};10d20: lut_data {8h78 , 24h390502};10d21: lut_data {8h78 , 24h390610};10d22: lut_data {8h78 , 24h39010a};10d23: lut_data {8h78 , 24h373112};10d24: lut_data {8h78 , 24h360008};10d25: lut_data {8h78 , 24h360133};10d26: lut_data {8h78 , 24h302d60};10d27: lut_data {8h78 , 24h362052};10d28: lut_data {8h78 , 24h371b20};10d29: lut_data {8h78 , 24h471c50};10d30: lut_data {8h78 , 24h3a1343};10d31: lut_data {8h78 , 24h3a1800};10d32: lut_data {8h78 , 24h3a19f8};10d33: lut_data {8h78 , 24h363513};10d34: lut_data {8h78 , 24h363603};10d35: lut_data {8h78 , 24h363440};10d36: lut_data {8h78 , 24h362201};10d37: lut_data {8h78 , 24h3c0134};10d38: lut_data {8h78 , 24h3c0428};10d39: lut_data {8h78 , 24h3c0598};10d40: lut_data {8h78 , 24h3c0600};10d41: lut_data {8h78 , 24h3c0708};10d42: lut_data {8h78 , 24h3c0800};10d43: lut_data {8h78 , 24h3c091c};10d44: lut_data {8h78 , 24h3c0a9c};10d45: lut_data {8h78 , 24h3c0b40};10d46: lut_data {8h78 , 24h381000};10d47: lut_data {8h78 , 24h381110};10d48: lut_data {8h78 , 24h381200};10d49: lut_data {8h78 , 24h370864};10d50: lut_data {8h78 , 24h400102};10d51: lut_data {8h78 , 24h40051a};10d52: lut_data {8h78 , 24h300000};10d53: lut_data {8h78 , 24h3004ff};10d54: lut_data {8h78 , 24h300e58};10d55: lut_data {8h78 , 24h302e00};10d56: lut_data {8h78 , 24h430060};10d57: lut_data {8h78 , 24h501f01};10d58: lut_data {8h78 , 24h440e00};10d59: lut_data {8h78 , 24h5000a7};10d60: lut_data {8h78 , 24h3a0f30};10d61: lut_data {8h78 , 24h3a1028};10d62: lut_data {8h78 , 24h3a1b30};10d63: lut_data {8h78 , 24h3a1e26};10d64: lut_data {8h78 , 24h3a1160};10d65: lut_data {8h78 , 24h3a1f14};10d66: lut_data {8h78 , 24h580023};10d67: lut_data {8h78 , 24h580114};10d68: lut_data {8h78 , 24h58020f};10d69: lut_data {8h78 , 24h58030f};10d70: lut_data {8h78 , 24h580412};10d71: lut_data {8h78 , 24h580526};10d72: lut_data {8h78 , 24h58060c};10d73: lut_data {8h78 , 24h580708};10d74: lut_data {8h78 , 24h580805};10d75: lut_data {8h78 , 24h580905};10d76: lut_data {8h78 , 24h580a08};10d77: lut_data {8h78 , 24h580b0d};10d78: lut_data {8h78 , 24h580c08};10d79: lut_data {8h78 , 24h580d03};10d80: lut_data {8h78 , 24h580e00};10d81: lut_data {8h78 , 24h580f00};10d82: lut_data {8h78 , 24h581003};10d83: lut_data {8h78 , 24h581109};10d84: lut_data {8h78 , 24h581207};10d85: lut_data {8h78 , 24h581303};10d86: lut_data {8h78 , 24h581400};10d87: lut_data {8h78 , 24h581501};10d88: lut_data {8h78 , 24h581603};10d89: lut_data {8h78 , 24h581708};10d90: lut_data {8h78 , 24h58180d};10d91: lut_data {8h78 , 24h581908};10d92: lut_data {8h78 , 24h581a05};10d93: lut_data {8h78 , 24h581b06};10d94: lut_data {8h78 , 24h581c08};10d95: lut_data {8h78 , 24h581d0e};10d96: lut_data {8h78 , 24h581e29};10d97: lut_data {8h78 , 24h581f17};10d98: lut_data {8h78 , 24h582011};10d99: lut_data {8h78 , 24h582111};10d100: lut_data {8h78 , 24h582215};10d101: lut_data {8h78 , 24h582328};10d102: lut_data {8h78 , 24h582446};10d103: lut_data {8h78 , 24h582526};10d104: lut_data {8h78 , 24h582608};10d105: lut_data {8h78 , 24h582726};10d106: lut_data {8h78 , 24h582864};10d107: lut_data {8h78 , 24h582926};10d108: lut_data {8h78 , 24h582a24};10d109: lut_data {8h78 , 24h582b22};10d110: lut_data {8h78 , 24h582c24};10d111: lut_data {8h78 , 24h582d24};10d112: lut_data {8h78 , 24h582e06};10d113: lut_data {8h78 , 24h582f22};10d114: lut_data {8h78 , 24h583040};10d115: lut_data {8h78 , 24h583142};10d116: lut_data {8h78 , 24h583224};10d117: lut_data {8h78 , 24h583326};10d118: lut_data {8h78 , 24h583424};10d119: lut_data {8h78 , 24h583522};10d120: lut_data {8h78 , 24h583622};10d121: lut_data {8h78 , 24h583726};10d122: lut_data {8h78 , 24h583844};10d123: lut_data {8h78 , 24h583924};10d124: lut_data {8h78 , 24h583a26};10d125: lut_data {8h78 , 24h583b28};10d126: lut_data {8h78 , 24h583c42};10d127: lut_data {8h78 , 24h583dce};10d128: lut_data {8h78 , 24h5180ff};10d129: lut_data {8h78 , 24h5181f2};10d130: lut_data {8h78 , 24h518200};10d131: lut_data {8h78 , 24h518314};10d132: lut_data {8h78 , 24h518425};10d133: lut_data {8h78 , 24h518524};10d134: lut_data {8h78 , 24h518609};10d135: lut_data {8h78 , 24h518709};10d136: lut_data {8h78 , 24h518809};10d137: lut_data {8h78 , 24h518975};10d138: lut_data {8h78 , 24h518a54};10d139: lut_data {8h78 , 24h518be0};10d140: lut_data {8h78 , 24h518cb2};10d141: lut_data {8h78 , 24h518d42};10d142: lut_data {8h78 , 24h518e3d};10d143: lut_data {8h78 , 24h518f56};10d144: lut_data {8h78 , 24h519046};10d145: lut_data {8h78 , 24h5191f8};10d146: lut_data {8h78 , 24h519204};10d147: lut_data {8h78 , 24h519370};10d148: lut_data {8h78 , 24h5194f0};10d149: lut_data {8h78 , 24h5195f0};10d150: lut_data {8h78 , 24h519603};10d151: lut_data {8h78 , 24h519701};10d152: lut_data {8h78 , 24h519804};10d153: lut_data {8h78 , 24h519912};10d154: lut_data {8h78 , 24h519a04};10d155: lut_data {8h78 , 24h519b00};10d156: lut_data {8h78 , 24h519c06};10d157: lut_data {8h78 , 24h519d82};10d158: lut_data {8h78 , 24h519e38};10d159: lut_data {8h78 , 24h548001};10d160: lut_data {8h78 , 24h548108};10d161: lut_data {8h78 , 24h548214};10d162: lut_data {8h78 , 24h548328};10d163: lut_data {8h78 , 24h548451};10d164: lut_data {8h78 , 24h548565};10d165: lut_data {8h78 , 24h548671};10d166: lut_data {8h78 , 24h54877d};10d167: lut_data {8h78 , 24h548887};10d168: lut_data {8h78 , 24h548991};10d169: lut_data {8h78 , 24h548a9a};10d170: lut_data {8h78 , 24h548baa};10d171: lut_data {8h78 , 24h548cb8};10d172: lut_data {8h78 , 24h548dcd};10d173: lut_data {8h78 , 24h548edd};10d174: lut_data {8h78 , 24h548fea};10d175: lut_data {8h78 , 24h54901d};10d176: lut_data {8h78 , 24h53811e};10d177: lut_data {8h78 , 24h53825b};10d178: lut_data {8h78 , 24h538308};10d179: lut_data {8h78 , 24h53840a};10d180: lut_data {8h78 , 24h53857e};10d181: lut_data {8h78 , 24h538688};10d182: lut_data {8h78 , 24h53877c};10d183: lut_data {8h78 , 24h53886c};10d184: lut_data {8h78 , 24h538910};10d185: lut_data {8h78 , 24h538a01};10d186: lut_data {8h78 , 24h538b98};10d187: lut_data {8h78 , 24h558006};10d188: lut_data {8h78 , 24h558340};10d189: lut_data {8h78 , 24h558410};10d190: lut_data {8h78 , 24h558910};10d191: lut_data {8h78 , 24h558a00};10d192: lut_data {8h78 , 24h558bf8};10d193: lut_data {8h78 , 24h501d40};10d194: lut_data {8h78 , 24h530008};10d195: lut_data {8h78 , 24h530130};10d196: lut_data {8h78 , 24h530210};10d197: lut_data {8h78 , 24h530300};10d198: lut_data {8h78 , 24h530408};10d199: lut_data {8h78 , 24h530530};10d200: lut_data {8h78 , 24h530608};10d201: lut_data {8h78 , 24h530716};10d202: lut_data {8h78 , 24h530908};10d203: lut_data {8h78 , 24h530a30};10d204: lut_data {8h78 , 24h530b04};10d205: lut_data {8h78 , 24h530c06};10d206: lut_data {8h78 , 24h502500};10d207: lut_data {8h78 , 24h300802};10d208: lut_data {8h78 , 24h303511};10d209: lut_data {8h78 , 24h303646};10d210: lut_data {8h78 , 24h3c0708};10d211: lut_data {8h78 , 24h382041};10d212: lut_data {8h78 , 24h382100};10d213: lut_data {8h78 , 24h381431};10d214: lut_data {8h78 , 24h381531};10d215: lut_data {8h78 , 24h380000};10d216: lut_data {8h78 , 24h380100};10d217: lut_data {8h78 , 24h380200};10d218: lut_data {8h78 , 24h380304};10d219: lut_data {8h78 , 24h38040a};10d220: lut_data {8h78 , 24h38053f};10d221: lut_data {8h78 , 24h380607};10d222: lut_data {8h78 , 24h38079b};10d223: lut_data {8h78 , 24h380803};10d224: lut_data {8h78 , 24h380920};10d225: lut_data {8h78 , 24h380a02};10d226: lut_data {8h78 , 24h380b58};10d227: lut_data {8h78 , 24h380c07};10d228: lut_data {8h78 , 24h380d68};10d229: lut_data {8h78 , 24h380e03};10d230: lut_data {8h78 , 24h380fd8};10d231: lut_data {8h78 , 24h381306};10d232: lut_data {8h78 , 24h361800};10d233: lut_data {8h78 , 24h361229};10d234: lut_data {8h78 , 24h370952};10d235: lut_data {8h78 , 24h370c03};10d236: lut_data {8h78 , 24h3a0217};10d237: lut_data {8h78 , 24h3a0310};10d238: lut_data {8h78 , 24h3a1417};10d239: lut_data {8h78 , 24h3a1510};10d240: lut_data {8h78 , 24h400402};10d241: lut_data {8h78 , 24h30021c};10d242: lut_data {8h78 , 24h3006c3};10d243: lut_data {8h78 , 24h471303};10d244: lut_data {8h78 , 24h440704};10d245: lut_data {8h78 , 24h460b35};10d246: lut_data {8h78 , 24h460c22};10d247: lut_data {8h78 , 24h483722};10d248: lut_data {8h78 , 24h382402};10d249: lut_data {8h78 , 24h5001a3};10d250: lut_data {8h78 , 24h350300};10d251: lut_data {8h78 , 24h303521};10d252: lut_data {8h78 , 24h303669};10d253: lut_data {8h78 , 24h3c0707};10d254: lut_data {8h78 , 24h382047};10d255: lut_data {8h78 , 24h382100};10d256: lut_data {8h78 , 24h381431};10d257: lut_data {8h78 , 24h381531};10d258: lut_data {8h78 , 24h380000};10d259: lut_data {8h78 , 24h380100};10d260: lut_data {8h78 , 24h380200};10d261: lut_data {8h78 , 24h3803fa};10d262: lut_data {8h78 , 24h38040a};10d263: lut_data {8h78 , 24h38053f};10d264: lut_data {8h78 , 24h380606};10d265: lut_data {8h78 , 24h3807a9};10d266: lut_data {8h78 , 24h380805};10d267: lut_data {8h78 , 24h380900};10d268: lut_data {8h78 , 24h380a02};10d269: lut_data {8h78 , 24h380bd0};10d270: lut_data {8h78 , 24h380c07};10d271: lut_data {8h78 , 24h380d64};10d272: lut_data {8h78 , 24h380e02};10d273: lut_data {8h78 , 24h380fe4};10d274: lut_data {8h78 , 24h381304};10d275: lut_data {8h78 , 24h361800};10d276: lut_data {8h78 , 24h361229};10d277: lut_data {8h78 , 24h370952};10d278: lut_data {8h78 , 24h370c03};10d279: lut_data {8h78 , 24h3a0202};10d280: lut_data {8h78 , 24h3a03e0};10d281: lut_data {8h78 , 24h3a0800};10d282: lut_data {8h78 , 24h3a096f};10d283: lut_data {8h78 , 24h3a0a00};10d284: lut_data {8h78 , 24h3a0b5c};10d285: lut_data {8h78 , 24h3a0e06};10d286: lut_data {8h78 , 24h3a0d08};10d287: lut_data {8h78 , 24h3a1402};10d288: lut_data {8h78 , 24h3a15e0};10d289: lut_data {8h78 , 24h400402};10d290: lut_data {8h78 , 24h30021c};10d291: lut_data {8h78 , 24h3006c3};10d292: lut_data {8h78 , 24h471303};10d293: lut_data {8h78 , 24h440704};10d294: lut_data {8h78 , 24h460b37};10d295: lut_data {8h78 , 24h460c20};10d296: lut_data {8h78 , 24h483716};10d297: lut_data {8h78 , 24h382404};10d298: lut_data {8h78 , 24h5001a3};10d299: lut_data {8h78 , 24h350300};10d300: lut_data {8h78 , 24h301602};10d301: lut_data {8h78 , 24h3b070a}; //10d251: lut_data {8h78 , 24h503d80};//10d252: lut_data {8h78 , 24h474101};10d302: lut_data {8hff , 24hffffff};default:lut_data {8h00,16h0000,8h00};endcase
endendmodule 四摄像头分辨率设置
下面是摄像头可以设置的分辨率我们这个摄像头设置的1280*720p这个分辨率
五摄像头数据采集
我们这个工程设置的输出为RGB565格式可以看出如果抓取16位数据刚好是两个8位数据合成也就是两个D[2]~D[9]需要舍弃低两位D[0]和D[1]所以我们采集数据是由两个8位组合为一个十六位数据。 数据转换模块将两个8位输入数据转为16位输出 六DDR配置 ddr具体配置请参考上一个章节AX7A200教程(8): HDMI输入和输出显示1080p视频本章节不再做详细介绍。
七HDMI输出配置
hdmi输出配置和摄像头配置采用同样的iic模块配置只是配置文件有所不同 八输出显示顶层模块和硬件连接 摄像头显示顶层
timescale 1ps/1psmodule top
(inout hdmi_scl,inout hdmi_sda,output hdmi_nreset_v10,//HDMI reset compatibility for version 1.0 and 1.1output hdmi_nreset, //HDMI reset compatibility for version 1.0 and 1.1inout cmos_scl, //cmos i2c clockinout cmos_sda, //cmos i2c datainput cmos_vsync, //cmos vsyncinput cmos_href, //cmos hsync refrence,data validinput cmos_pclk, //cmos pxiel clockinput [7:0] cmos_db, //cmos dataoutput cmos_rst_n, //cmos reset output cmos_pwdn,output cmos_xclk,output vout_clk,output vout_hs,output vout_vs,output vout_de,output[23:0] vout_data,inout [31:0] ddr3_dq,inout [3:0] ddr3_dqs_n,inout [3:0] ddr3_dqs_p,output [14:0] ddr3_addr,output [2:0] ddr3_ba,output ddr3_ras_n,output ddr3_cas_n,output ddr3_we_n,output ddr3_reset_n,output [0:0] ddr3_ck_p,output [0:0] ddr3_ck_n,output [0:0] ddr3_cke,output [0:0] ddr3_cs_n,output [3:0] ddr3_dm,output [0:0] ddr3_odt,//Differential system clocksinput sys_clk_p,input sys_clk_n,output[3:0] led,input sys_rst);wire read_req;
wire read_req_ack;
wire read_en;
wire[31:0] read_data;
wire write_en;
wire[31:0] write_data;
wire write_req;
wire write_req_ack;
wire video_clk; //video pixel clock
wire hs;
wire vs;
wire de;wire[9:0] lut_index;
wire[31:0] lut_data;
wire[9:0] cmos_lut_index;
wire[31:0] cmos_lut_data;
wire clk_100m;
wire clk_24m;
wire rst_n;
wire locked;
wire power_done;
wire[15:0] cmos_16bit_data;
wire cmos_16bit_wr;
wire[31:0] cmos_write_data;wire sys_clk_w;
wire init_calib_complete;
wire start_en;
wire clk_out2;
assign vout_hs hs;
assign vout_vs vs;
assign vout_de de;
assign vout_clk video_clk;assign rst_n locked;
assign hdmi_nreset_v10 locked;
assign hdmi_nreset locked;assign cmos_xclk (power_done)? clk_24m:1b0;
assign cmos_write_data {8d0,cmos_16bit_data[4:0],3d0,cmos_16bit_data[10:5],2d0,cmos_16bit_data[15:11],3d0};
/*****************************************pll*******************************************/IBUFDS sys_clk_ibufgds
(.O (sys_clk_w),.I (sys_clk_p),.IB (sys_clk_n)
);clk_wiz_0 instance_name(// Clock out ports.clk_out1(clk_100m), // output clk_out1.clk_out2(clk_out2), // output clk_out2.clk_out3(video_clk), // output clk_out3.clk_out4(clk_24m), // output clk_out4// Status and control signals.resetn(sys_rst), // input reset.locked(locked), // output locked// Clock in ports.clk_in1(sys_clk_w)); // input clk_in1/***********************************ov5640_power***************************************/
power_ctrl power_ctrl_inst(// system signals.i_clk (clk_100m ),// 100MHz.rst_n (rst_n ), .ov5640_pwdn (cmos_pwdn ), .ov5640_rst_n (cmos_rst_n ), .power_done (power_done )
);
/***********************************ov5640_config***************************************/
//I2C master controller
i2c_config i2c_config_m1(.rst (~power_done ),.clk (clk_100m ),.clk_div_cnt (16d200 ),.i2c_addr_2byte (1b1 ),.lut_index (cmos_lut_index ),.lut_dev_addr (cmos_lut_data[31:24] ),.lut_reg_addr (cmos_lut_data[23:8] ),.lut_reg_data (cmos_lut_data[7:0] ),.error ( ),.done ( ),.i2c_scl (cmos_scl ),.i2c_sda (cmos_sda )
);
//configure look-up table
lut_ov5640_rgb565_1280_720 lut_ov5640_m1(.lut_index (cmos_lut_index ),.lut_data (cmos_lut_data )
); /***********************************hdmi_out_config***************************************/
//I2C master controller
i2c_config i2c_config_m0(.rst (~rst_n ),.clk (clk_100m ),.clk_div_cnt (16d500 ),.i2c_addr_2byte (1b0 ),.lut_index (lut_index ),.lut_dev_addr (lut_data[31:24] ),.lut_reg_addr (lut_data[23:8] ),.lut_reg_data (lut_data[7:0] ),.error ( ),.done ( ),.i2c_scl (hdmi_scl ),.i2c_sda (hdmi_sda )
);
//configure look-up table
lut_hdmi lut_hdmi_m0(.lut_index (lut_index ),.lut_data (lut_data )
);
/**********************************cmos_data****************************************************/
//CMOS sensor 8bit data is converted to 16bit data
cmos_8_16bit cmos_8_16bit_m0(.rst (~rst_n ),.pclk (cmos_pclk ),.pdata_i (cmos_db ),.de_i (cmos_href ),.pdata_o (cmos_16bit_data ),.hblank ( ),.de_o (cmos_16bit_wr )
);
/***********************************hdmi_out_en***************************************/
vs_count vs_count_inst(.clk(clk_100m),.rst(init_calib_complete),.vs_in(cmos_vsync),//cmos_vsync.start_en(start_en));/**************************************ddr*************************************/
wire read_fifo_empty;
wire read_valid;ddr_test ddr_test_inst (// Memory interface ports.ddr3_addr (ddr3_addr), // output [13:0] ddr3_addr.ddr3_ba (ddr3_ba), // output [2:0] ddr3_ba.ddr3_cas_n (ddr3_cas_n), // output ddr3_cas_n.ddr3_ck_n (ddr3_ck_n), // output [0:0] ddr3_ck_n.ddr3_ck_p (ddr3_ck_p), // output [0:0] ddr3_ck_p.ddr3_cke (ddr3_cke), // output [0:0] ddr3_cke.ddr3_ras_n (ddr3_ras_n), // output ddr3_ras_n.ddr3_reset_n (ddr3_reset_n), // output ddr3_reset_n.ddr3_we_n (ddr3_we_n), // output ddr3_we_n.ddr3_dq (ddr3_dq), // inout [31:0] ddr3_dq.ddr3_dqs_n (ddr3_dqs_n), // inout [3:0] ddr3_dqs_n.ddr3_dqs_p (ddr3_dqs_p), // inout [3:0] ddr3_dqs_p.ddr3_cs_n (ddr3_cs_n), // output [0:0] ddr3_cs_n.ddr3_dm (ddr3_dm), // output [3:0] ddr3_dm.ddr3_odt (ddr3_odt), // output [0:0] ddr3_odt.init_calib_complete (init_calib_complete),// System Clock Ports.sys_clk_i (clk_out2),.sys_rst (rst_n), // input sys_rst//fifo.wr_clk (cmos_pclk),.rd_clk (video_clk),.write_fifo_wr_en (cmos_16bit_wr),.write_fifo_din (cmos_write_data),.read_fifo_rd_en (read_en),.read_fifo_dout (read_data),.read_fifo_empty (read_fifo_empty),.read_valid (read_valid),.ddr_rd_en (start_en),.vin_vs (cmos_vsync),.vout_vs (read_req),.rd_reset (read_req_ack) ); //video output timing generator and generate a frame read data request
video_timing_data video_timing_data_m0
(.video_clk (video_clk ),.rst (~read_valid ),.read_req (read_req ),.read_req_ack (read_req_ack ),.read_en (read_en ),.read_data (read_data ),.hs (hs ),.vs (vs ),.de (de ),.vout_data (vout_data )
); ila_0 ila_0_name (.clk(clk_out2), // input wire clk.probe0(read_en), // input wire [0:0] probe0 .probe1(read_valid), // input wire [0:0] probe1 .probe2(start_en), // input wire [0:0] probe2 .probe3(read_req), // input wire [0:0] probe3 .probe4(read_data), // input wire [0:0] probe4 .probe5(vout_clk), // input wire [0:0] probe5 .probe6(vout_hs), // input wire [0:0] probe6 .probe7(vout_vs), // input wire [0:0] probe7 .probe8(vout_de), // input wire [0:0] probe8 .probe9(vout_data) // input wire [0:0] probe9
);endmodulevivado工程截图可以看到有很多模块这里不一一截图提供代码
抓取的hdmi输出管脚波形 摄像头输出显示硬件连接
九摄像头输出显示效果
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